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I included the logo of, and a link to, WDC in the template heading, since WDC is a major (the only?) developer of significant improvements to the 65xx CPU range, and still manufacturing processors and microcontrollers (mostly the latter) with the 65xx architecture. I also moved the 65802 and 816 items to the end, since those are 1) 16-bit, and 2) the latest models in the range.
To better the look of the template I'll try and make similarly-sized versions of the two logos. --Wernher 23:12, 12 December 2005 (UTC)
Re: the TFD vote mentioned in Wernher's 13 Dec comment in the previous thread:
I don't take any of this personally (I hope you don't take it as a personal insult or anything that I nominated your template for deletion; you've done some good work on the MOS chip pages). Hopefully we can work out something that is mutually agreeable and looks good. Crotalus horridus 04:39, 13 December 2005 (UTC)
Rod Orgill belongs in this list, and probably Will Mathys as well, for the 6502, for their contributions to the 6501/6502 ISA. See Development of the MOS Technology 6502: A Historical Perspective:
For the most part, design of the 6502 was paper-and-pencil, with some computer-assisted aspects of layout. Peddle was project leader, and focused on the business aspects; he also worked on the instruction set architecture — basically the abstract programmer’s model of how the chip worked, including the various opcodes — with Orgill and Mathys.[7]
To reduce this to a working circuit design, the 6502 team had to come up with a digital design of instruction decoders, arithmetic/logic unit (ALU), registers and data paths (high-level register-centric design) that could be implemented using individual gates made out of the NMOS transistors and depletion loads (low-level circuit design). Peddle, Orgill, Mathys, and Mensch worked out the register structure and other sections of the high-level design,[1 page 28][8] with Mathys translating a sequence of data transfers for each instruction into state diagrams and logic equations.[8] Mensch and Orgill completed the translation of the register-centric design from logic equations into a circuit schematic (technically known as the “650X-C Microprocessor Logic Diagram”[9]) of the NMOS transistors and depletion loads, annotated with dimensions, while Wil Mathys worked on verifying the logic.[10]
Mensch describes Orgill and himself as “semiconductor engineers”, responsible for reducing logic equations to transistor-level implementation in an IC to ensure that it meets speed, size, interface compatibility, and power specifications.[11] Orgill’s specialization was on the high-level architecture, contributing to the ISA, with “a focus on logic design and minimization”,[11] whereas Mensch had a predilection for low-level details. Mensch determined the design rules, ran circuit simulations on portions of the chip — limited to around 100 components at a time with the computation facilities available to MOS Technology in 1975 — and designed in the two-phase clock generator that would become the distinguishing factor between the 6501 and the 6502.[11][12 page 19] (The 6501 and 6502 shared all masks except for the metal layer, which had two slightly different versions: the 6501 left the two-phase clock generator disconnected so that it was pin-compatible with the Motorola 6800, whereas the 6502 connected the clock generator circuitry, breaking pin-compatibility. In 1976, MOS Technology agreed to cease production of the 6501 as a condition of a legal settlement with Motorola.[13])
(see also footnotes in this article)
For the 6510 and 8502, it might be others... http://c128.com/about-us mentions Dave DiOrio as chip design lead on the C128 (8502). Ask Al Charpentier and Bil Herd while they're still alive and lucid....
Arghman (talk) 14:16, 25 November 2022 (UTC)