This article has multiple issues. Please help improve it or discuss these issues on the talk page. (Learn how and when to remove these template messages) This article needs additional citations for verification. Please help improve this article by adding citations to reliable sources in this article. Unsourced material may be challenged and removed.Find sources: "WDC 65C22" – news · newspapers · books · scholar · JSTOR (January 2017) (Learn how and when to remove this template message) The topic of this article may not meet Wikipedia's notability guidelines for products and services. Please help to demonstrate the notability of the topic by citing reliable secondary sources that are independent of the topic and provide significant coverage of it beyond a mere trivial mention. If notability cannot be shown, the article is likely to be merged, redirected, or deleted.Find sources: "WDC 65C22" – news · newspapers · books · scholar · JSTOR (November 2015) (Learn how and when to remove this template message) (Learn how and when to remove this template message)
W65C22S Versatile Interface Adapter in a DIP-40 package.

The W65C22 versatile interface adapter (VIA) is an input/output device for use with the 65xx series microprocessor family.

Overview

Designed by the Western Design Center, the W65C22 is made in two versions, both of which are rated for 14 megahertz operation, and available in DIP-40 or PLCC-44 packages.[1]

As with the NMOS 6522, the W65C22 includes functions for programmed control of two peripheral ports (ports A and B). Two program–controlled 8-bit bi-directional peripheral I/O ports allow direct interfacing between the microprocessor and selected peripheral units. Each port has input data latching capability. Two programmable data direction registers (A and B) allow selection of data direction (input or output) on an individual I/O line basis.

Also provided are two programmable 16-bit interval timer/counters with latches. Timer 1 may be operated in a one-shot or free-run mode. In either mode, a timer can generate an interrupt when it has counted down to zero. Timer 2 functions as an interval counter or a pulse counter. If operating as an interval counter, timer 2 is driven by the microprocessor's PHI2 clock source. As a pulse counter, timer 2 is triggered by an external pulse source on the chip's PB6 line.

Serial data transfers are provided by a serial to parallel/parallel to serial shift register, with bit transfers synchronized with the PHI2 clock. Application versatility is further increased by various control registers, including an interrupt flag register, an interrupt enable register and two Function Control Registers.

Features

See also

References