Hayes was born and grew up in Newbridge, Ireland[3] and did his undergraduate studies at the National University of Ireland, Dublin, graduating in 1965. He went on to graduate studies at the University of Illinois at Urbana–Champaign, earning a master's degree in 1967 and a Ph.D. in 1970.[4] He was responsible for the logic design of the input-output channel control units of ILLIAC III.[2] After working in The Hague for Shell for two years, he returned to academia, taking a faculty position at the University of Southern California in 1972. In 1979 Hayes was a Visiting Associate Professor at Stanford. He moved to Michigan in 1982, where he was the founding director of the Advanced Computer Architecture Laboratory.[1] Hayes retired from University of Michigan in 2023.[2]
Hayes became an IEEE Fellow in 1985 "for contributions to digital testing techniques and to switching theory and logical design",[11] and an ACM Fellow in 2001 "for outstanding contributions to logic design and testing and to fault-tolerant computer architecture."[12] In 2004, the University of Illinois Urbana-Champaign department of electrical and computer engineering gave him their distinguished alumni award.[4]
In 2013, the IEEE Computer Society Test Technology Technical Community honored Hayes with Lifetime Contribution Medal.[13]
John P. Hayes, Trevor N. Mudge, Quentin F. Stout, Stephen Colley, John Palmer: A Microprocessor-based Hypercube Supercomputer. IEEE Micro 6(5): 6-17 (1986)
Smita Krishnaswamy, George F. Viamontes, Igor L. Markov, John P. Hayes: Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices. Design Automation and Test in Europe (DATE) 2005: 282-287[17]
Pai-Shun Ting, John P. Hayes: Eliminating a hidden error source in stochastic circuits. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) 2017: 1-6.[18]
^Hayes, J. P.; Mudge, T. N.; Stout, Q. F.; Colley, S.; Palmer, J. (1986), "Architecture of a hypercube supercomputer", Proc. International Conference on Parallel Processing, pp. 653–660.
^Hayes, J. P.; Mudge, T.; Stout, Q. F.; Colley, S.; Palmer, J. (1986), "A microprocessor-based hypercube supercomputer", IEEE Micro, 6 (5): 6–17, doi:10.1109/MM.1986.304707, S2CID7927930. Lee, T. C.; Hayes, J. P. (1992), "A fault-tolerant communication scheme for hypercube computers", IEEE Transactions on Computers, 41 (10): 1242–1256, doi:10.1109/12.166602.
^Hayes, J. P. (1976), "A Graph Model for Fault-Tolerant Computing Systems", IEEE Transactions on Computers, C-25 (9): 875–884, doi:10.1109/TC.1976.1674712, S2CID24323472.
^Shende, V. V.; Prasad, A. K.; Markov, I. L.; Hayes, J. P. (2003), "Synthesis of reversible logic circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 22 (6): 710–722, arXiv:quant-ph/0207001, doi:10.1109/TCAD.2003.811448.
^Alaghi, A.; Hayes, J. P. (2013). "Survey of Stochastic Computing". ACM Transactions on Embedded Computing Systems. 12 (2s): 1. doi:10.1145/2465787.2465794. S2CID4689958.